WEDNESDAY
|
Ses# |
Session 16 |
Session 17 |
Session 18 |
Session 19 |
Session 20 |
HoT |
8:30 to 10:00 |
Special Session: The Future of Timing Closure |
Panel: Verification, What Works and What Doesn't |
Design Space Exploration and Scheduling for Embedded Software |
Advances in Accelerated Simulation |
Design for Manufacturability |
|
BREAK 10:15 - 10:30 am |
Ses# |
Session 21 |
Session 22 |
Session 23 |
Session 24 |
Session 25 |
10:30 to 12:00 |
Statistical Timing and Analysis |
Panel: System- Level Design: Six Success Stories in Search of an Industry |
New Ideas in Placement |
Model Order Reduction and Variational Techniques for Parasitic Analysis |
Compilation Techniques for Embedded Applications |
LUNCH Noon - 2 pm |
Ses# |
Session 26 |
Session 27 |
Session 28 |
Session 29 |
Session 30 |
HoT |
2:00 to 4:00 |
Special Session: Platform-Based System Design |
Innovations in Logic Synthesis |
Yield Estimation and Optimization |
High-Level Techniques for Signal Processing |
Advanced Test Solutions |
|
BREAK 4 - 4:30 pm |
Ses# |
Session 31 |
Session 32 |
Session 33 |
Session 34 |
Session 35 |
4:30 to 6:30 |
Advances in Boolean Analysis Techniques |
Panel: Were the Good Old Days all that Good? EDA Then and Now |
Power Optimization for Real-Time and Media-Rich Embedded
Systems
|
Latency Tolerance and Asynchronous Design |
New Technologies in System Design |